--lpm_decode CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone IV E" LPM_DECODES=7 LPM_WIDTH=3 data enable eq
--VERSION_BEGIN 13.0 cbx_cycloneii 2013:06:12:18:03:43:SJ cbx_lpm_add_sub 2013:06:12:18:03:43:SJ cbx_lpm_compare 2013:06:12:18:03:43:SJ cbx_lpm_decode 2013:06:12:18:03:43:SJ cbx_mgl 2013:06:12:18:05:10:SJ cbx_stratix 2013:06:12:18:03:43:SJ cbx_stratixii 2013:06:12:18:03:43:SJ  VERSION_END


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--  functions, and any output files from any of the foregoing 
--  (including device programming or simulation files), and any 
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--  without limitation, that your use is for the sole purpose of 
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--  applicable agreement for further details.



--synthesis_resources = lut 8 
SUBDESIGN decode_qsa
( 
	data[2..0]	:	input;
	enable	:	input;
	eq[6..0]	:	output;
) 
VARIABLE 
	data_wire[2..0]	: WIRE;
	enable_wire	: WIRE;
	eq_node[6..0]	: WIRE;
	eq_wire[7..0]	: WIRE;
	w_anode1849w[3..0]	: WIRE;
	w_anode1866w[3..0]	: WIRE;
	w_anode1876w[3..0]	: WIRE;
	w_anode1886w[3..0]	: WIRE;
	w_anode1896w[3..0]	: WIRE;
	w_anode1906w[3..0]	: WIRE;
	w_anode1916w[3..0]	: WIRE;
	w_anode1926w[3..0]	: WIRE;

BEGIN 
	data_wire[] = data[];
	enable_wire = enable;
	eq[] = eq_node[];
	eq_node[6..0] = eq_wire[6..0];
	eq_wire[] = ( w_anode1926w[3..3], w_anode1916w[3..3], w_anode1906w[3..3], w_anode1896w[3..3], w_anode1886w[3..3], w_anode1876w[3..3], w_anode1866w[3..3], w_anode1849w[3..3]);
	w_anode1849w[] = ( (w_anode1849w[2..2] & (! data_wire[2..2])), (w_anode1849w[1..1] & (! data_wire[1..1])), (w_anode1849w[0..0] & (! data_wire[0..0])), enable_wire);
	w_anode1866w[] = ( (w_anode1866w[2..2] & (! data_wire[2..2])), (w_anode1866w[1..1] & (! data_wire[1..1])), (w_anode1866w[0..0] & data_wire[0..0]), enable_wire);
	w_anode1876w[] = ( (w_anode1876w[2..2] & (! data_wire[2..2])), (w_anode1876w[1..1] & data_wire[1..1]), (w_anode1876w[0..0] & (! data_wire[0..0])), enable_wire);
	w_anode1886w[] = ( (w_anode1886w[2..2] & (! data_wire[2..2])), (w_anode1886w[1..1] & data_wire[1..1]), (w_anode1886w[0..0] & data_wire[0..0]), enable_wire);
	w_anode1896w[] = ( (w_anode1896w[2..2] & data_wire[2..2]), (w_anode1896w[1..1] & (! data_wire[1..1])), (w_anode1896w[0..0] & (! data_wire[0..0])), enable_wire);
	w_anode1906w[] = ( (w_anode1906w[2..2] & data_wire[2..2]), (w_anode1906w[1..1] & (! data_wire[1..1])), (w_anode1906w[0..0] & data_wire[0..0]), enable_wire);
	w_anode1916w[] = ( (w_anode1916w[2..2] & data_wire[2..2]), (w_anode1916w[1..1] & data_wire[1..1]), (w_anode1916w[0..0] & (! data_wire[0..0])), enable_wire);
	w_anode1926w[] = ( (w_anode1926w[2..2] & data_wire[2..2]), (w_anode1926w[1..1] & data_wire[1..1]), (w_anode1926w[0..0] & data_wire[0..0]), enable_wire);
END;
--VALID FILE