<?xml version="1.0" encoding="UTF-8"?>
<preferences>
 <debug showDebugMenu="0" />
 <systemtable filter="Default">
  <columns>
   <connections preferredWidth="127" />
   <irq preferredWidth="34" />
  </columns>
 </systemtable>
 <clocktable>
  <columns>
   <clockname preferredWidth="268" />
   <clocksource preferredWidth="268" />
   <frequency preferredWidth="253" />
  </columns>
 </clocktable>
 <library expandedCategories="Project,Library" />
 <window width="1101" height="932" x="17" y="108" />
 <hdlexample language="VHDL" />
</preferences>